Technical Specification
Hardware Design
The design of the dPOD, the specialized hardware that connects the PC to the target microcontroller, is based on a protocol-translation system that receives RS232 serial signals after conversion to TTL-levels. The controller is constructed using a PIC16F873A running at 20 MHz and will receive the converted RS232 serial signals from a MAX232 chip.
The serial communication between the host PC and the dPOD are managed by the RS232 flow control signals RTS and CTS. The hardware is designed such that the serial signals sent from the PC remain compatible with any Linux-compatible PC, which is one of the test cases for this project.
<more details about the hardware design have been removed for confidential reasons>
Software Design
The software contribution to this project allows an embedded system developer to control the dPOD using a sophisticated and generally familiar integrated development environment. Rather than using the traditional minicom terminal window in Linux, the Eclipse Project was chosen to integrate with because of its growing familiarity among all types of developers and its wide variety of available plug-ins.
The Eclipse Project already has C/C++ Development Tools (CDT), and is soon to release a set of Embedded Development Tools (EDT). These two toolkits can be leveraged in this project since programs for the HCS12 can be written in the C language. The CDT provides an extensible launch configuration, debugging and tracing capabilities and various views within the workbench. Specifically, the disassembly, memory, breakpoints, and registers views can be extended in a new Eclipse-based embedded development environment for the dPOD.
In order to leverage the plug-in architecture of the Eclipse Platform, several extensions to the Eclipse Project and Eclipse CDT project were contributed, as shown in the following architecture diagram.
This embedded development environment solution creates four plug-ins, which compose the top-most layer of this architecture, the dPOD layer. This layer is responsible for communicating to the dPOD hardware, displaying data on the target microcontroller in the workbench, and for synchronizing states between the current debug sessions at the PC with the target microcontroller.
